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ASIC Design Engineer Intern in San Jose, CA

CiscoSan Jose, CAPosted 29 minutes ago

Pay
$90k – $120k
per year
Type
Internship
Full time
Where
San Jose, CA
Who
Associate or Bachelor's
Students
Apply by
Oct 19, 2026
Date from the posting

Meet the Team

The Silicon One team builds hardware platforms that power Cisco's core Switching, Routing, and Wireless products for customers worldwide. Because the team owns product development from design through qualification and production, it can move quickly, experiment often, and think differently about hard problems.

Your Impact

As an ASIC Design Engineer, you will help design and integrate next-generation silicon for Cisco's core networking products. You will work across all phases of the ASIC design lifecycle with cross-functional teams to deliver robust, high-performance solutions.

  • Take part in creating design specifications and reviewing micro-architecture specifications.
  • Implement Verilog RTL that meets timing, performance, and power targets.
  • Support full chip integration and timing methodology and analysis.
  • Develop, analyze, and ensure functional coverage.
  • Work with the verification team to resolve design bugs and close code coverage.
  • Work with the physical design team to resolve timing and place-and-route issues.
  • Triage, debug, and find root causes for simulation issues, software bring-up, and customer failures.
  • Run diagnostic and post-silicon validation tests in the lab.

Why Cisco?

Cisco is working to connect and protect organizations in the AI era and beyond. For 40 years we have built solutions that help people and technology work together across physical and digital worlds, giving customers security, visibility, and insight across their entire digital footprint.

Our technology depth and a worldwide network of experts create room to grow and build. We work as a team, collaborate with empathy, and aim to make large things happen on a global scale.

Skills mentioned

  • Python
  • PERL
  • TCL
  • Verilog
  • SystemVerilog

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