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ASIC Verification Intern

Hewlett Packard EnterpriseRoseville, CAPosted 18 hours ago

Pay
$35 – $41
per hour
Type
Internship
Full time
Where
Roseville, CA
Who
Bachelor's or Master's
Students
Apply by
Nov 12, 2026
Date from the posting

ASIC Verification Engineering Intern

This role is hybrid, with an expectation of working from an HPE office on average 2 days per week.

Who We Are

Hewlett Packard Enterprise is the global edge-to-cloud company advancing the way people live and work. We help companies connect, protect, analyze, and act on their data and applications wherever they live, from edge to cloud, so they can turn insights into outcomes. Our culture values new and better ways to accelerate what's next, and we know varied backgrounds are valued and succeed here.

Job Description

Aruba, a Hewlett Packard Enterprise Company, is a leading provider of next-generation networking solutions for the mobile enterprise. We are looking for an ASIC Post-Si Verification Engineering Intern to join our team in Roseville, CA.

Aruba Mobility-Defined Networks automate infrastructure-wide performance optimization and trigger security actions that once required manual IT intervention, delivering better productivity and lower operational costs.

Responsibilities

The intern will work with the HPE Aruba ASIC development team on next generation products and will have a summer project that supports current or future ASIC development. The ASIC team builds state of the art networking chips for the market and our customers, so we are looking for people who want to contribute at this level.

Interns will learn from senior members of the ASIC and VLSI team. Work may include RTL and physical design, pre-silicon and post-silicon verification, formal verification, script and tool development, schedule breakdowns, and document generation. Assignments will vary, and final alignment will depend on student skills and business needs.

Knowledge and Skills

  • Basic programming or scripting knowledge (e.g., Verilog, SystemVerilog, Python, PERL, TCL, C, C++).
  • Experience with hardware design.
  • Strong interest in high-tech and a passion for learning.
  • Excellent communication and interpersonal skills.
  • Strong problem-solving and analytical skills.
  • Ability to work within a team environment.

Impact and Scope

This internship is intended for university students actively enrolled in a college or institution pursuing a Bachelor's degree in a technical field. Most interns work during school breaks and then return to their university. There may be part-time opportunities for full-time students during the school year in some countries.

Accessibility

HPE is committed to an inclusive and accessible workplace and encourages applications from all qualified individuals, including those with disabilities. If you need accommodation at any stage of the application or interview process, you can submit a request through the secure form linked on the careers site. This option is reserved for applicants needing assistance or reasonable accommodation related to a disability.

What We Can Offer You

Health and Wellbeing: A comprehensive suite of benefits supports physical, financial, and emotional wellbeing for team members and their loved ones.

Personal and Professional Development: Specific programs help you reach career goals, whether that means becoming a knowledge expert in your field or applying your skills to another division.

Unconditional Inclusion: HPE celebrates individual uniqueness and gives team members flexibility to manage work and personal needs.

The expected base salary range for this position is $35.00 to $41.00 per hour in California. Actual offers may vary based on location, experience, education, and skill level. Variable incentives may also be offered.

HPE is an Equal Employment Opportunity employer and does not discriminate on the basis of race, gender, or any other protected category. HPE will comply with all applicable laws regarding the use of arrest and conviction records.

Skills mentioned

  • C++
  • Python
  • PERL
  • TCL
  • Verilog
  • SystemVerilog

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