Entry Level DFT Design Engineer

Job Description

As part of global Design teams, you will help bring new microprocessor-based SoC designs from initial test requirements through DFT structural test pattern generation and debug, and into full-scale production.

Your responsibilities will include:

• Specifying and creating test patterns, pre-silicon verification, pattern conversion to ATE, and post-silicon pattern debug.
• Supporting the Test Engineering team with patterns for manufacturing test, qualification, yield enhancement, and product performance analysis.
• Serving as a key interface between Design, Test Engineering, Product Engineering, and Fab teams.
• Specifying, implementing, and validating built-in test features, and delivering all DFT test patterns for the product.

Qualifications

• Recent graduate (0-2 years) with a Bachelor's or Master's degree in Engineering: EE, Computer Engineering, CS, EET, or equivalent.
• Proficiency in Python, Verilog, Perl, Tcl, and Unix.
• Experience with multiple aspects of structural test design, ATPG, test coverage, fault universe, JTAG, BSDL, memory and logic BIST, and DFT logic.
• Knowledge or experience with ATPG/DFT tools such as FastScan, LBIST, MBIST, DFTCompiler, etc.
• Semiconductor testing experience.
• ATE VLSI tester programming and usage (J973, Tiger/Catalyst, UltraFex, or Verigy 93000) is a plus.
• Knowledge or experience with functional pattern test.
• Excellent oral and written communication skills, with the ability to partner with team members from other departments, disciplines, and cultures.
• Proven track record of working with minimal direction while meeting schedules.
• Ability to multi-task and prioritize tasks to meet customer needs.